Advanced Methods for Evolutionary Design of Complex Digital Circuits

Reseach leader:Sekanina Lukáš
Team members:Bidlo Michal, Dobai Roland, Drahošová Michaela, Dvořák Milan (FIT VUT), Grochol David (FIT VUT), Hrbáček Radek, Minařík Miloš, Mrázek Vojtěch (FIT VUT), Petrlík Jiří, Vašíček Zdeněk
Agency:Czech Science Foundation
Code:GA14-04197S
Start:2014-01-01
End:2016-12-31
Keywords:Evolutionary circuit design, evolvable hardware, field programmable gate array, co-evolution
Annotation:
The evolutionary circuit design is the use of bio-inspired search algorithms for automated synthesis and optimization of electronic circuits. Although many interesting results have been obtained using the evolutionary design, the scalability problem is still considered as the most significant problem of the method. In this project, we propose and advocate new approaches to evolutionary circuit design that will enable us to eliminate the scalability problem and thus construct and optimize complex digital circuits and adaptive hardware systems in field programmable gate arrays (FPGA). The following results are projected: (1) New functional equivalence checking algorithms for accelerating the fitness calculation. (2) New multiobjective and co-evolutionary design algorithms. (3) Routine design and optimization of complex circuits by means of the proposed tools. (4) New architectures of FPGA-based evolvable hardware systems. 

Products

2014ZyEHW: Evolvable hardware in Xilinx Zynq-7000 field-programmable gate arrays, software, 2014
Authors: Dobai Roland

Publications

2017VAŠÍČEK Zdeněk and MRÁZEK Vojtěch. Trading between Quality and Non-functional Properties of Median Filter in Embedded Systems. Genetic Programming and Evolvable Machines. Berlin: Springer Verlag, 2017, vol. 2017, no. 1, pp. 45-82. ISSN 1389-2576.
2016BIDLO Michal. Evolution of Complex Emergent Behaviour in Multi-State Cellular Automata. In: Proceedings of the 2016 on Genetic and Evolutionary Computation Conference Companion. New York: Association for Computing Machinery, 2016, pp. 157-158. ISBN 978-1-4503-4323-7.
 BIDLO Michal. Evolution of Generic Square Calculations in Cellular Automata. In: Proceedings of the 8th International Joint Conference on Computational Intelligence - Volume 3: ECTA. Porto: SciTePress - Science and Technology Publications, 2016, pp. 94-102. ISBN 978-989-758-201-1.
 BIDLO Michal. On Routine Evolution of Complex Cellular Automata. IEEE Transactions on Evolutionary Computation. 2016, vol. 20, no. 5, pp. 742-754. ISSN 1089-778X.
 GROCHOL David and SEKANINA Lukáš. Evolutionary Design of Fast High-quality Hash Functions for Network Applications. In: GECCO '16 Proceedings of the 2016 on Genetic and Evolutionary Computation Conference. New York, NY: Association for Computing Machinery, 2016, pp. 901-908. ISBN 978-1-4503-4206-3.
 GROCHOL David, SEKANINA Lukáš, KOŘENEK Jan, ŽÁDNÍK Martin and KOŠAŘ Vlastimil. Evolutionary Circuit Design for Fast FPGA-Based Classification of Network Application Protocols. Applied Soft Computing. Amsterdam: Elsevier Science, 2016, vol. 38, no. 1, pp. 933-941. ISSN 1568-4946.
 MRÁZEK Vojtěch, SARWAR Syed Shakib, SEKANINA Lukáš, VAŠÍČEK Zdeněk and ROY Kaushik. Design of Power-Efficient Approximate Multipliers for Approximate Artificial Neural Networks. In: Proceedings of the IEEE/ACM International Conference on Computer-Aided Design. Austin, TX: Association for Computing Machinery, 2016, pp. 811-817. ISBN 978-1-4503-4466-1.
 SÁNCHEZ-CLEMENTE Antonio José, ENTRENA Luis, HRBÁČEK Radek and SEKANINA Lukáš. Error Mitigation using Approximate Logic Circuits: A Comparison of Probabilistic and Evolutionary Approaches. IEEE Transactions on Reliability. 2016, vol. 65, no. 4, pp. 1871-1883. ISSN 0018-9529.
 SEKANINA Lukáš and VAŠÍČEK Zdeněk. Genetic Improvement for Approximate Computing. In: 2nd Workshop on Approximate Computing (WAPCO 2016). Prague, 2016, pp. 1-2.
 SEKANINA Lukáš. Introduction to Approximate Computing: Embedded Tutorial. In: 19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Košice: Institute of Electrical and Electronics Engineers, 2016, pp. 90-95. ISBN 978-1-5090-2467-4.
 VAŠÍČEK Zdeněk and SEKANINA Lukáš. Evolutionary Design of Complex Approximate Combinational Circuits. Genetic Programming and Evolvable Machines. Berlin: Springer Verlag, 2016, vol. 17, no. 2, pp. 169-192. ISSN 1389-2576.
 VAŠÍČEK Zdeněk and SEKANINA Lukáš. Search-based synthesis of approximate circuits implemented into FPGAs. In: 26th International Conference on Field Programmable Logic and Applications. Lausanne: Institute of Electrical and Electronics Engineers, 2016, pp. 1-4. ISBN 978-2-8399-1844-2.
 WIGLASZ Michal and DRAHOŠOVÁ Michaela. Plastic Fitness Predictors Coevolved with Cartesian Programs. In: 19th European Conference on Genetic programming. Berlin: Springer International Publishing, 2016, pp. 164-179. ISBN 978-3-319-30667-4.
2015BIDLO Michal. Investigation of Replicating Tiles in Cellular Automata Designed by Evolution Using Conditionally Matching Rules. In: 2015 IEEE International Conference on Evolvable Systems (ICES). Cape Town: IEEE Computational Intelligence Society, 2015, pp. 1506-1513. ISBN 978-1-4799-7560-0.
 BIDLO Michal. On Routine Evolution of New Replicating Structures in Cellular Automata. In: 7th International Conference on Evolutionary Computationa Theory and Applications. Lisbon: SciTePress - Science and Technology Publications, 2015, pp. 28-38. ISBN 978-989-758-157-1.
 DOBAI Roland and KOŘENEK Jan. Evolution of Non-Cryptographic Hash Function Pairs for FPGA-Based Network Applications. In: 2015 IEEE Symposium Series on Computational Intelligence. Cape Town: Institute of Electrical and Electronics Engineers, 2015, pp. 1214-1219. ISBN 978-1-4799-7560-0.
 DRAHOŠOVÁ Michaela, HULVA Jiří and SEKANINA Lukáš. Indirectly Encoded Fitness Predictors Coevolved with Cartesian Programs. In: Genetic Programming. Berlin: Springer International Publishing, 2015, pp. 113-125. ISBN 978-3-319-16500-4.
 GROCHOL David, SEKANINA Lukáš, ŽÁDNÍK Martin and KOŘENEK Jan. A Fast FPGA-Based Classification of Application Protocols Optimized Using Cartesian GP. In: Applications of Evolutionary Computation, 18th European Conference. Berlin: Springer International Publishing, 2015, pp. 67-78. ISBN 978-3-319-16548-6.
 HRBÁČEK Radek. Parallel Multi-Objective Evolutionary Design of Approximate Circuits. In: GECCO '15 Proceedings of the 2015 conference on Genetic and evolutionary computation. New York: Association for Computing Machinery, 2015, pp. 687-694. ISBN 978-1-4503-3472-3.
 MRÁZEK Vojtěch and VAŠÍČEK Zdeněk. Automatic Design of Low-Power VLSI Circuits: Accurate and Approximate Multipliers. In: Proceedings of 13th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing. Porto: Institute of Electrical and Electronics Engineers, 2015, pp. 106-113. ISBN 978-1-4673-8299-1.
 MRÁZEK Vojtěch and VAŠÍČEK Zdeněk. Evolutionary Design of Transistor Level Digital Circuits using Discrete Simulation. In: Genetic Programming, 18th European Conference, EuroGP 2015. Berlin: Springer International Publishing, 2015, pp. 66-77. ISBN 978-3-319-16500-4.
 MRÁZEK Vojtěch, VAŠÍČEK Zdeněk and SEKANINA Lukáš. Evolutionary Approximation of Software for Embedded Systems: Median Function. In: GECCO Companion '15 Proceedings of the Companion Publication of the 2015 on Genetic and Evolutionary Computation Conference. New York: Association for Computing Machinery, 2015, pp. 795-801. ISBN 978-1-4503-3488-4.
 SEKANINA Lukáš and VAŠÍČEK Zdeněk. Evolutionary Computing in Approximate Circuit Design and Optimization. In: 1st Workshop on Approximate Computing (WAPCO 2015). Amsterdam, 2015, pp. 1-6.
 SEKANINA Lukáš and VAŠÍČEK Zdeněk. Functional Equivalence Checking for Evolution of Complex Digital Circuits. Evolvable Hardware - From Practice to Application. Berlin: Springer Verlag, 2015, pp. 175-189. ISBN 978-3-662-44615-7.
 VAŠÍČEK Zdeněk and SEKANINA Lukáš. Circuit Approximation Using Single- and Multi-Objective Cartesian GP. In: Genetic Programming. Berlin: Springer International Publishing, 2015, pp. 217-229. ISBN 978-3-319-16500-4.
 VAŠÍČEK Zdeněk. Cartesian GP in Optimization of Combinational Circuits with Hundreds of Inputs and Thousands of Gates. In: Genetic Programming, 18th European Conference, EuroGP 2015. Berlin: Springer International Publishing, 2015, pp. 139-150. ISBN 978-3-319-16500-4.
2014BIDLO Michal and VAŠÍČEK Zdeněk. On Evolution of Multi-Category Pattern Classifiers Suitable for Embedded Systems. In: Genetic Programming, 17th European Conference, EuroGP 2014. Berlin: Springer Verlag, 2014, pp. 234-245. ISBN 978-3-662-44302-6.
 BIDLO Michal. Evolution of Computational Structures in Uniform Cellular Automata. In: 2014 IEEE Congress on Evolutionary Computation (CEC). Beijing: IEEE Computational Intelligence Society, 2014, pp. 2732-2739. ISBN 978-1-4799-1488-3.
 DOBAI Roland. Evolutionary On-line Synthesis of Hardware Accelerators for Software Modules in Reconfigurable Embedded Systems. In: 2014 24th International Conference on Field Programmable Logic and Applications (FPL). Munich: Institute of Electrical and Electronics Engineers, 2014, pp. 1-6. ISBN 978-3-00-044645-0.
 DOBAI Roland, GLETTE Kyrre, TORRESEN Jim and SEKANINA Lukáš. Evolutionary Digital Circuit Design with Fast Candidate Solution Establishment in Field Programmable Gate Arrays. In: 2014 IEEE International Conference on Evolvable Systems Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, 2014, pp. 85-92. ISBN 978-1-4799-4480-4.
 DRAHOŠOVÁ Michaela, KOMJÁTHY Gergely and SEKANINA Lukáš. Towards Compositional Coevolution in Evolutionary Circuit Design. In: 2014 IEEE International Conference on Evolvable Systems Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, 2014, pp. 157-164. ISBN 978-1-4799-4479-8.
 HRBÁČEK Radek and DVOŘÁK Václav. Bent Function Synthesis by Means of Cartesian Genetic Programming. In: Parallel Problem Solving from Nature - PPSN XIII. Heidelberg: Springer Verlag, 2014, pp. 414-423. ISBN 978-3-319-10761-5.
 HRBÁČEK Radek and SEKANINA Lukáš. Towards Highly Optimized Cartesian Genetic Programming: From Sequential via SIMD and Thread to Massive Parallel Implementation. In: GECCO '14 Proceedings of the 2014 conference on Genetic and evolutionary computation. New York: Association for Computing Machinery, 2014, pp. 1015-1022. ISBN 978-1-4503-2662-9.
 HRBÁČEK Radek. Bent Functions Synthesis on Xeon Phi Coprocessor. In: Mathematical and Engineering Methods in Computer Science. Heidelberg: Springer Verlag, 2014, pp. 88-99. ISBN 978-3-319-14895-3.
 MINAŘÍK Miloš and SEKANINA Lukáš. Exploring the Search Space of Hardware / Software Embedded Systems by Means of GP. In: Genetic Programming, 17th European Conference, EuroGP 2014. Berlin: Springer Verlag, 2014, pp. 112-123. ISBN 978-3-662-44302-6.
 MRÁZEK Vojtěch and VAŠÍČEK Zdeněk. Acceleration of Transistor-Level Evolution using Xilinx Zynq Platform. In: 2014 IEEE International Conference on Evolvable Systems Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, 2014, pp. 9-16. ISBN 978-1-4799-4480-4.
 MRÁZEK Vojtěch. Akcelerace evolučního návrhu digitálních obvodů na úrovni tranzistorů s využitím platformy Zynq. In: Proceedings of the 20th Student Conference, EEICT 2014. Brno: Brno University of Technology, 2014, pp. 229-231. ISBN 978-80-214-4923-7.
 SEKANINA Lukáš and VAŠÍČEK Zdeněk. On Evolutionary Approximation of Logic Circuits. Computing with New Resources. Berlin: Springer Verlag, 2014, pp. 367-378. ISBN 978-3-319-13349-2.
 SEKANINA Lukáš, PTÁK Ondřej and VAŠÍČEK Zdeněk. Cartesian Genetic Programming as Local Optimizer of Logic Networks. In: 2014 IEEE Congress on Evolutionary Computation. Beijing: IEEE Computational Intelligence Society, 2014, pp. 2901-2908. ISBN 978-1-4799-1488-3.
 VAŠÍČEK Zdeněk and SEKANINA Lukáš. Evolutionary Design of Approximate Multipliers Under Different Error Metrics. In: 17th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Warsaw: IEEE Computer Society, 2014, pp. 135-140. ISBN 978-1-4799-4558-0.
 VAŠÍČEK Zdeněk and SEKANINA Lukáš. How to Evolve Complex Combinational Circuits From Scratch?. In: 2014 IEEE International Conference on Evolvable Systems Proceedings. Piscataway: Institute of Electrical and Electronics Engineers, 2014, pp. 133-140. ISBN 978-1-4799-4480-4.

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